Area-array flip-chip interconnection or C4 technique places a solder bump area array on the top of a fabricated microelectronic circuit chip or integrated circuit chip and the chip is connected via the solder bumps to a chip carrier substrate by flipping the chip up-side-down and aligning it to pads on the carrier followed by reflowing the solder to connect the bumps. This face-down placement of the chip on the carrier is the reason it is called flip-chip joining. The advantages of the C4 technique are: 1) the entire area of the chip can be covered with solder bumps for the highest possible number of input/output points on a chip; 2) the interconnect distances to the circuit on the chip are shorter thereby permitting faster signal response and lower inductance; 3) power and heat distribution are more uniform; and 4) simultaneous switching noise is reduced.
The solder bumps are deposited on a patterned solder-wettable layered structure known as BLM (Ball Limiting Metallurgy). The BLM defines the terminal metal pads on the top surface of the chip which is wettable by solder and which also limits the lateral flow of the solder to the pad area. After the solder bumps are reflowed on the patterned BLM to form balls, the chips are joined to a matching footprint of solder-wettable layers on the chip carrier. The BLM is generally a multilayer structure comprising a lower adhesion layer, a middle reaction barrier layer, and a wettable upper layer. The lower layer provides adhesion to the underlying substrate. This layer also can serve as a diffusion/reaction barrier layer to prevent interaction of the silicon wafer and its wiring layers. This layer is thin, on the order of hundreds to thousands angstroms, and usually deposited by sputtering or evaporation on the wafer passivation, which is a polymer, such as polyimide, or an oxide or a nitride. Examples of materials for the adhesion layer are Cr, TiW, Ta, W, Ti, TiN, TaN, Zr or a combination of these materials.
The middle layer of the BLM is a reaction barrier layer which is solderable by molten solder but reacts slowly to allow for multiple reflow cycles without being totally consumed. The material of this layer is Cr, CrCu, Cu, Al, Ni, or any metal containing one or more of these material and is usually on the order of thousands of angstroms to microns in thickness after be deposited by physical vapor deposition (PVD), sputtering or evaporation.
The upper layer of the BLM is the solder wettable which allows easy solder wetability and a fast reaction with the solder. Copper (Cu) is an example of the material normally used and its thickness is of the order of a few hundreds to thousands of angstroms and, in some cases, up to microns after being deposited by sputtering, electroless- or electro-plating.
To fabricate the solder bumps on top of the BLM structure, a number of techniques are known in the art, such as evaporation, plating, stencil printing, paste screening, and molten solder injection. A present method of forming the C4 solder bumps is to electroplate solder through a thick (100 um) dry resist film mask onto the BLM structure. Following a resist strip, a wet etch is used to pattern the BLM, using the plated solder bumps as the mask. This is described in a paper entitled “Low-cost wafer bumping”, IBM J. Res. & Dev., Vol. 49, No. 4/5, July/September 2005 and which also describes Injection-Molded Solder (IMS), the preferred method in the present specification of depositing solder to the BLM structure or capture pads on the chips in the wafer. This “Low-cost wafer bumping” paper is incorporated by reference.
One of the problems with the present C4 solder bumps is that the solder contains lead (Pb) which is not desirable from an environmental standpoint. To use Pb-free solder requires a thicker copper (Cu) layer because the solder is comprised solely of tin (Sn) and will diffuse into the chip with a thin Cu layer. A significant problem with this process involves dimensional control of the final placement of the edges of the BLM layer, which tends to undercut the top layer of Cu by as much as 10 microns per edge due to wet etching, reducing the adhesive cross-section of the C4 structure and creating a reliability risk. Another problem with the present C4 solder bump method is that a terminal aluminum (Al) on top of the chip serves as a landing pad for the BLM/C4 structure to increase reliability in pull testing of the structure. The Al pad is expensive to fabricate and is incompatible with the copper (Cu) metallization of the chip.